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Software controlled store/recall cycle, Switching waveforms – Cypress CY14B256L User Manual

Page 12

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CY14B256L

Document Number: 001-06422 Rev. *H

Page 12 of 18

Software Controlled STORE/RECALL Cycle

The software controlled STORE/RECALL cycle follows.

[15, 16]

Parameter

Alt

Description

25 ns

35 ns

45 ns

Unit

Min

Max

Min

Max

Min

Max

t

RC

[16]

t

AVAV

STORE/RECALL Initiation Cycle Time

25

35

45

ns

t

SA

t

AVEL

Address Setup Time

0

0

0

ns

t

CW

t

ELEH

Clock Pulse Width

20

25

30

ns

t

HA

t

GHAX,

t

ELAX

Address Hold Time

1

1

1

ns

t

RECALL

RECALL Duration

120

120

120

μs

Switching Waveforms

Figure 10. CE Controlled Software STORE/RECALL Cycle

[16]

Figure 11. OE Controlled Software STORE/RECALL Cycle

[16]

t

RC

t

RC

t

SA

t

SCE

t

HA

t

STORE

/ t

RECALL

DATA VALID

DATA VALID

6

#

S

S

E

R

D

D

A

1

#

S

S

E

R

D

D

A

HIGH IMPEDANCE

ADDRESS

CE

OE

DQ (DATA)

t

RC

t

RC

6

#

S

S

E

R

D

D

A

1

#

S

S

E

R

D

D

A

ADDRESS

t

SA

t

SCE

t

HA

t

STORE

/ t

RECALL

DATA VALID

DATA VALID

HIGH IMPEDANCE

CE

OE

DQ (DATA)

Notes

15. The software sequence is clocked on the falling edge of CE controlled READs or OE controlled READs.
16. The six consecutive addresses must be read in the order listed in the Mode Selection table. WE must be HIGH during all six consecutive cycles.

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