Agilent Technologies FS2010 - Manual (Page 26)

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Timing Analysis
Since the FS2010 interface does not buffer the PCI-X bus, it introduces
negligible skew to the PCI-X Local Bus signals.
Load the logic analyzer configuration file.
If the FS2010 software is installed, load the logic analyzer
configuration file for timing from the logic/configs/FuturePlus/FS2010
directory on the 167xx analyzer. If using the 1680/90/900 double
click the folder that was placed on the desktop during installation and
choose the appropriate configuration file.
Touch RUN and, as soon as there is activity on the bus, the logic
analyzer will begin to acquire data. The analyzer will continue to acquire
data and will display the data when the analyzer memory is full, the
trigger specification is TRUE or when you touch STOP.
The logic analyzer will flash “Waiting in level 1” if the trigger specification
has not been met.
If you are analyzing a 32 bit bus, load the configuration file for a 64 bit
bus into a single analyzer card, the upper 64 bit labels will be truncated,
but will work fine.
Acquiring Data