Agilent Technologies FS2010 - Manual (Page 21)

21
State Analysis
This chapter explains how to configure the FS2010 to perform state
analysis on the PCI-X Local Bus. The configuration software sets up the
format specification menu of the logic analyzer for compatibility with the
PCI-X Local Bus. The next chapter explains how to configure the
FS2010 to perform timing analysis.
The FS2010 State/Timing Adapter Probe interface does not require that
a PCI-X add-in card be installed in the FS2010 card edge extender
connector.
Load the logic analyzer configuration file and configure the workspace
for PCI-X analysis.
Configure the trigger menu to acquire PCI-X data. Select RUN and, as
soon as there is activity on the bus, the logic analyzer will begin to
acquire data. The analyzer will continue to acquire data and will display
the data when the analyzer memory is full; the trigger specification is
TRUE or when you select STOP.
The logic analyzer will flash “Slow or Missing Clock” if it does not see the
PCI-X signal CLK toggling.
The logic analyzer will flash “Waiting in level 1” if the trigger specification
has not been met.
If you are analyzing a 32 bit bus, load the configuration file for a 64 bit
bus into a single analyzer card, the upper 64 bit labels will be truncated,
but will work fine.
Acquiring Data