Cirrus Logic CS5508 - Manual (Page 11)

XIN
XIN/2
CONV
STATE
t
cd1
t
dd1
MSB MSB-1
pl1
t
ph1
t
fd2
t
LSB+1 LSB
Conversion2 STATE (CONV held high)
SDATA(o)
SCLK(o)
Conversion1
CS
DRDY
Standby Standby Conversion Conversion
Hi-Z
Hi-Z
Hi-Z
Hi-Z
t
csd1
Figure 3. Timing Relationships; SSC Mode (Not to Scale)
DRDY
CS
SCLK(i)
MSB-1 MSB MSB-2 SDATA(o) Hi-Z
MSB-1 MSB LSB+2 LSB+1 LSB
DRDY
CS
SCLK(i)
SDATA(o) Hi-Z
t
fd3
t
csd2
t
dd2 t
ph2
t
pl2
t
fd4
t
dd2
t
csd2
Figure 4. Timing Relationships; SEC Mode (Not to Scale)
CS5505/6/7/8
DS59F4 11
CS5505/6/7/8
DS59F7 11