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Pin descriptions – Cirrus Logic CS5381 User Manual

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DS563F2

CS5381

1. PIN DESCRIPTIONS

Pin Name

#

Pin Description

RST

1

Reset (Input) - The device enters a low power mode when low.

M/S

2

Master/Slave Mode (Input) - Selects operation as either clock master or slave.

LRCK

3

Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.

SCLK

4

Serial Clock (Input/Output) - Serial clock for the serial audio interface.

MCLK

5

Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.

VD

6

Digital Power (Input) - Positive power supply for the digital section.

GND

7,18

Ground (Input) - Ground reference. Must be connected to analog ground.

VL

8

Logic Power (Input) - Positive power for the digital input/output.

SDOUT

9

Serial Audio Data Output (Output) - Output for two’s complement serial audio data.

MDIV

10

MCLK Divider (Input) - Enables a master clock divide by two function.

HPF

11

High-Pass Filter Enable (Input) - Enables the Digital High-Pass Filter.

I²S/LJ

12

Serial Audio Interface Format Select (Input) -Selects either the left-justified or I²S format for the SAI.

M0
M1

13,14

Mode Selection (Input) - Determines the operational mode of the device.

OVFL

15

Overflow (Output, open drain) - Detects an overflow condition on both left and right channels.

AINL+
AINL-

16, 17

Differential Left Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
modulators via the AINL+/- pins.

VA

19

Analog Power (Input) - Positive power supply for the analog section.

AINR-
AINR+

20, 21

Differential Right Channel Analog Input (Input) -Signals are presented differentially to the delta-
sigma modulators via the AINR+/- pins.

VQ

22

Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage.

REF_GND

23

Reference Ground (Input) - Ground reference for the internal sampling circuits.

FILT+

24

Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.

RST

1

24

FILT+

M/S

2

23

REFGND

LRCK

3

22

VQ

SCLK

4

21

AINR+

MCLK

5

20

AINR-

VD

6

19

VA

GND

7

18

GND

VL

8

17

AINL-

SDOUT

9

16

AINL+

MDIV

10

15

OVFL

HPF

11

14

M1

I²S/LJ

12

13

M0