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2 serial audio interface, 3 digital interface, 4 analog connections – Cirrus Logic CS5344 User Manual

Page 14: Sour, Figure 6 on

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14

DS687F4

CS5343/4

Draft

2/1/11

4.2

Serial Audio Interface

The CS5343 output is serial data in I²S audio format and the CS5344 output is serial data in Left-Justified
audio format.

Figures 4

and

5

show the I²S and Left-Justified data relative to SCLK and LRCK. Additionally,

Figures 1

and

2

display more information on the required timing for the serial audio interface format. For an

overview of serial audio interface formats, please refer to Cirrus Application Note AN282.

4.3

Digital Interface

VA supplies power to both the analog and digital sections of the ADC, and also powers the serial port. Con-
sequently, the digital interface logic level must equal VA to within the limits specified under

“Digital Charac-

teristics” on page 8

.

4.4

Analog Connections

The analog modulator samples the input signal at half of the internal master clock rate, or 6.144 MHz when
MCLK = 12.288 MHz. The digital filter will reject signals within the stopband of the filter. However, there is
no rejection for input signals which are multiples of the input sampling frequency (n

6.144 MHz), where

n=0,1,2,... Refer to

Figure 6

which shows the recommended topology of the analog input network. The ex-

ternal shunt capacitor and internal input impedance form a single-pole RC filter to provide the appropriate
filtering of noise at the modulator sampling frequency. Additionally, the 180 pF capacitor acts as a charge
source for the internal sampling circuits. Capacitors of NPO or other high-quality dielectric will produce the
best results while capacitors with a large voltage coefficient (such as general-purpose ceramics) can de-
grade signal linearity.

Figure 4. CS5343 I²S Serial Audio Interface

SDATA

23 22

8

7

23 22

SCLK

LRCK

23 22

6

5

4

3

2

1

0

8

7

6

5

4

3

2

1

0

9

9

Left Channel

Right Channel

Figure 5. CS5344 Left-Justified Serial Audio Interface

SDATA

23 22

7

6

23 22

SCLK

LRCK

23 22

5

4

3

2

1

0

8

7

6

5

4

3

2

1

0

8

9

9

Left Channel

Right Channel

Figure 6. CS5343/4 Analog Input Network

CS5343/4

AIN

Input

R1

R2

1 µF

180pF

C0G

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