Cirrus Logic CS4353 - Manual (Page 9)

DS803F3 9
CS4353
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE
Parameters Symbol Min Max Units
MCLK Frequency 2.048 51.2 MHz
MCLK Duty Cycle 45 55 %
Input Sample Rate (Auto selection) Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
Fs
Fs
Fs 8
84
170
54
108
216
kHz
kHz
kHz
LRCK Duty Cycle 40 60 %
SCLK Pulse Width Low t
sclkl
20 - ns
SCLK Pulse Width High t
sclkh
20 - ns
SCLK Period Single-Speed Mode - s
Double-Speed Mode - s
Quad-Speed Mode - s
SCLK rising to LRCK edge delay t
slrd
20 - ns
SCLK rising to LRCK edge setup time t
slrs
20 - ns
SDIN valid to SCLK rising setup time t
sdlrs
20 - ns
SCLK rising to SDIN hold time t
sdh
20 - ns
sclkh
t
slrs
t
slrd
t
sdlrs
t sdh
t
sclkl
t
SDATA
SCLK
LRCK
Figure 1. Serial Input Timing
1
128
 Fs
----------------------
1
64
 Fs
------------------
1
64
 Fs
------------------