Cirrus Logic CDB4270 - Manual (Page 36)

36
DS68
6DB3
CDB4270
10. CDB BLOCK DIAGRAM
Figure 65. Block Diagram
CS4270
CS8416
S/PDIF
Input Single-Ended
Output
Single-Ended Input
USB/Serial Control Port
FPGA
CS8406
S/PDIF
Output
DSP HEADER
Osc.
ANALOG INPUT
ANALOG OUTPUT
Clocks
/Data
Hardware
Setup
MCLK BUS
A
D
C/
D
A
C
Cl
o
c
k
s &
Da
ta
ADC/DAC
Clocks/
Data
C
lo
c
ks/
Da
ta
I 2 C/SPI Header
Power
HW Setup
Switches
Hardware
Setup
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 22
Figure 23
Figure 23
Figure 24
Figure 21
Hardware
Setup