Teledyne LeCroy Protocol PCI Express Script Automation Test Tool - Manual (Page 48)

Teledyne LeCroy PCI Express Script Automation Test Tool User Manual
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3.2.1.10 Test 53-20. BadLCRC
ASSERTIONS COVERED: DLL.5.3#2
The intent of this test is to verify that a receiver discards a TLP with a bad CRC by NAKing it and reports a BAD
TLP error associated with the port.
Trainer Stimulus: link_53-20_BadLCRC.peg
Recording Options: link_layer.rec
Verification Scripts: link_53-20_BadLCRC.pevs
Test Algorithm:
1. Issue command to the Driver to clear all error status bits for the Root or Switch port to which the Device
Emulator is attached.
2. Main test stage. Do the following:
a. Turn off automatic LCRC generation and automatic sequence numbering.
b. Send a Memory Read Request TLP with bad LCRC.
c. Wait for some time.
d. Send the same Memory Read Request TLP, now with good LCRC.
3. Issue command to the Driver to reflect the current values of the Error Reporting Registers for the port to
which the Device Emulator is attached (using Memory Writes).
4. Switch back to automatic settings, retrain, and initialize the link.
Pass/Fail Criteria:
Test should successfully progress though all test stages.
All test stages should be executed without protocol violations.
Verify that:
a) The DUT NAKs the TLP with bad CRC.
b) The DUT completes the Memory Read transaction.
c) The DUT set only the ERR_CORR bit in its Device Status register.
d) The DUT did not set any error bits in the Advanced Uncorrectable Error Status register (if implemented).
e) The DUT set the “BAD_TLP” bit in the Advanced Error Reporting Correctable Error Status register (if
implemented).
f) The DUT set the “Correctable Error Received” bit in the Root Error Status register (if implemented and
applicable).
If the DUT meets all these criteria, the DUT passes the test.