Teledyne LeCroy Protocol PCI Express Script Automation Test Tool - Manual (Page 45)

Teledyne LeCroy PCI Express Script Automation Test Tool User Manual
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3.2.1.7 Test 52-150. CorruptedCRC_DLLP
ASSERTIONS COVERED: DLL.5.2#15
The intent of this test is to ensure that a DUT recognizes a DLLP with a bad CRC, drops it, and logs a BAD_DLLP
port error.
Trainer Stimulus: link_52-150_CorruptedCRC_DLLP.peg
Recording Options: link_layer.rec
Verification Scripts: link_52-150_CorruptedCRC_DLLP.pevs
Test Algorithm:
1. Issue command to the Driver to clear all error status bits for the Root or Switch port to which the Device
Emulator is attached.
2. Main test stage. Do the following:
a. Issue command to the Driver to perform 1-DWORD Memory Write to the Device Emulator.
b. Switch to the 'Disable' ACK/NAK policy.
c. Wait for the Memory Write TLP.
d. Send the Ack DLLP with bad CRC.
e. Switch back to the 'Automatic' ACK/NAK policy.
f.
Acknowledge the retransmitted TLP.
3. Issue command to the Driver to reflect the current values of the Error Reporting Registers for the port to
which the Device Emulator is attached (using Configuration Writes).
Pass/Fail Criteria:
Test should successfully progress though all test stages.
All test stages should be executed without protocol violations.
Verify that:
a) The Memory Write TLP for which the DUT received an ACK with a bad CRC is retransmitted by the DUT.
b) The DUT set the ERR_CORR bit in its Device Status register.
c) The DUT did not set any error bits in the Advanced Uncorrectable Error Status register (if implemented).
d) The DUT set the “BAD DLLP” and “Replay Timer Timeout Status” bits in the Advanced Error Reporting
Correctable Error Status register (if implemented).
e) The DUT set the “Correctable Error Received” and “Multiple Correctable Errors Received” bits in the Root Error
Status register (if implemented and applicable).
If the DUT meets all these criteria, the DUT passes the test.