Teledyne LeCroy PCI Express 3.0 Mid-Bus Probe - Manual (Page 4)

Teledyne LeCroy PCIe 3.0 Mid-Bus Probe Installation Guide Version 1.2
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1 Introduction
Teledyne LeCroy offers a wide variety of ways to connect PCI Express protocol analyzers to products
under test. There are four common methods: Interposers, Specialty Probes, Mid-Bus Probes and Multi-
lead Probes.
If the product uses a standard PCI Express card connector, an interposer is used which is inserted
between the PCIe Card and the card slot. The interposer taps off the data traffic to allow the analyzer to
monitor and record traffic with minimal perturbation of the electrical interface.
Specialty probes are used with specific card configurations, and are used in the same manner as an
interposer card (in fact a specialty probe is an interposer card designed for a specific interface). Teledyne
LeCroy supports a range of specialty probes including ExpressCard, AMC, XMC, Mini Card, External
Cable, ExpressModule, and HP Blade Server interfaces.
If the product has an embedded PCI Express bus (e.g., a bus which runs between chips on the same
circuit board), then either a mid-bus probe or a multi-lead probe can be used. The mid-bus probe
requires a connection footprint (see below) to be designed into the board. The multi-lead probe allows
individual connections to each bus trace on the board.
The Teledyne LeCroy mid-bus probes are 16-channel differential signal probes that meet the demand for
high-density signal access, accuracy and repeatability while providing connector-less attachment to the
device under test. They are based upon the configuration that was initially recommended in the Intel PCI
Express Mid-Bus Probing Footprint and Pinout Revision 1.0 document dated 8/05/03 and the subsequent
revisions.
A mid-bus probe is one of the tools that can greatly help engineers debugging PCI Express buses. A PCI
Express mid-bus probing solution provides direct probing capability of a PCI Express bus at a width of up
to 16 lanes. To accommodate a mid-bus probe, a special pad layout is required to expose the PCI
Express differential pairs on the surface of the target board.
Although not part of the PCI Express specifications, the industry has
developed common mid-bus probe footprints for PCIe 1.0a, PCIe
2.0 and PCIe 3.0 applications (the “full-size” PCIe 3.0 footprint is
shown on the right). These footprints are designed into the PCB.
For PCIe 3.0 applications, the probe cable attachment uses a probe
connector which is mounted the PCB as shown in the lower image
on the right.
The appropriate footprint is recommended for use with all types of
test equipment including protocol analyzers, logic analyzers and
oscilloscopes. The required pad layout can be in x4 (half-size), x8
(full-size) or x16 (dual full-size) configurations depending on the
maximum number of lanes that need to be probed. All footprint sizes support probing at reduced lane
widths (e.g., x1) and at lane widths up to the maximum footprint size. The illustration on page 3 shows
the completed assembly for probing up to x8 configurations (for x16 configurations, a second Y-cable,
probe pod, header cable assembly and probe connector are used, but connection is made to the same
Summit T3-16 analyzer). As noted, a single full-size probe connector supports up to x8 lane widths
bidirectional, but can also be configured to support x16 unidirectional (as can a half-size probe connector
support x8 unidirectional).
Note that this manual documents the mid-bus footprint used for PCIe 3.0 applications; the probe
footprints for PCIe 1.0a and PCIe 2.0 are covered in the Gen2 Mid-Bus Probe User Manual.
Teledyne LeCroy makes three versions of mid-bus probes, one for PCIe 1.0a (2.5 GT/s data rates, also
referred to as “Gen1”), one for PCIe 2.0 (2.5 and 5 GT/s data rates, also referred to as “Gen2”) and one