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Xylem Expert 7060_7070_Modbus User Manual

Page 35

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Communication protocol Serie30

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3.3

Principle of message interchange

3.3.1 General rules

An address may only be allocated to one device connected to the bus. If two devices on the bus have the same address,

both will respond, leading to a conflict.

Every data interchange is initiated by the master. This means that a device may only transmit data if requested to do so by

the master.

A message consists of several bytes. These bytes are transmitted without any interruption.

Maximal time between two bytes:

1.5ms @ 9600 baud (1.5 byte length)

0.20 ms @ 115200 baud (2.3 byte length)

If the time beween two bytes exceed the specified time, the slave ignores the received data, because of wrong message

length or CRC value. In that case the answer is omitted.

The addressed device must respond within time T

1,

otherwise the message will be invalid.

Bit frame:

ST

D0

D1

D2

D3

D4

D5

D6

D7

SP

ST

D0

D6

D7

SP

ST: start bit, SP: stop bit. A parity bit (if active) is inserted before the SP, D0 .. D7: 8 data bits

Message frame:

Master:

Request

T

1

Slave:

Response

Master:

Request

T

2

Response times:

T

1

: Time between receipt of inquiry and beginning of response.

Min. 1ms to max. 100ms for all functions and devices.

Most functions (except those with EEPROM access like information values):T

1

min. 1.2… 3ms

T

2

: Time to ready-to-receive state for the slave:

min 1 ms @ 9600 baud (1 byte length)

min 0.10 ms @ 115200 baud (1 byte length)

3.3.2 Treatment of errors
2 types of errors may occur during the interchange of messages between master and slave: transmission errors and exception

errors.

3.3.2.1 Transmission errors
These errors are primarily accountable to line faults. The message format is incorrect. The following problems are possible :

A received message is too short. Æ e.g. too much of time gap in frame between the bytes.

A message is longer than the internal transmission buffer permits.

The word length cannot be interpreted correctly.

The CRC16 checksum is incorrect.

In these cases the slave denies the request and will therefore not reply. This will lead to a timeout at the master. → the request

has to be repeated again.

In response to a transmission error, all received data are ignored. The slave remains in receive mode while the master is

required to initiate a new data interchange.