Max1802 digital camera step-down power supply – Rainbow Electronics MAX1802 User Manual
Page 23
MAX1802
Digital Camera Step-Down
Power Supply
______________________________________________________________________________________
23
To achieve a stable circuit for the core converter, use
the following procedure:
1) Determine the desired crossover frequency, either
1/3 of the zero due to the output capacitor ESR:
or 1/5 of the switching frequency:
whichever is lower.
2) Determine the pole frequency due to the output
capacitor and the load resistor:
or
3) Determine the compensation resistor required to set
the desired crossover frequency:
or, by simplifying and using the typical V
REF
= 1.25V:
R
C
= 50k
Ω/V V
OUT
C
OUT
f
C
4) Determine the compensation capacitor to set the
proper error-amplifier pole and zero determined from
the above equations:
Auxiliary Controllers
The auxiliary controllers use voltage mode to regulate
their output voltages. The following explains how to
compensate the control system for optimal perfor-
mance. The compensation differs depending on
whether the inductor current is continuous or discontin-
uous.
Discontinuous Inductor Current
For discontinuous inductor current, the PWM controller
has a single pole. The pole frequency and DC gain of
the PWM controller are dependent on the operating
duty cycle, which is:
D = (2 L f
OSC
/ R
E
)1/2
where R
E
is the equivalent load resistance, or:
R
E
= V
IN
2 R
LOAD
/ (V
OUT
(V
OUT
- V
IN
))
The frequency of single pole due to the PWM converter
is:
P
O
= (2 V
OUT
- V
IN
) / (2
π
(V
OUT
- V
IN
) R
LOAD
C
OUT
)
and the DC gain of the PWM controller is:
A
VO
= 2 V
OUT
(V
OUT
- V
IN
) R
LOAD
/ ((2 V
OUT
- V
IN
) D)
Note that, as in the current-mode, step-down cases
above, as R
LOAD
is increased, the pole frequency
decreases and the DC gain increases proportionally.
Since the crossover frequency is the product of the
pole frequency and the DC gain, it remains indepen-
dent of the load.
As in the cases of the main and core converters, the gain
through the voltage-divider is A
VDV
= V
REF
/ V
OUT
, and
the DC gain of the error amplifier is A
VEA
= 2000V/V.
Thus, the DC loop gain is A
VDC
= A
VDV
A
VEA
A
VO
.
The compensation resistor-capacitor pair at COMP
cause a pole and zero at frequencies (in Hz):
P
C
= G
EA
/ (4000
π
C
C
) = 1 / (4x107
π
C
C
)
Z
C
= 1 / (2
π
R
C
C
C
)
and the ESR of the output filter capacitor causes a zero
in the loop response at the frequency (in Hz): Z
O
= 1 /
(2
π
C
OUT
ESR).
The DC gain and the poles and zeros are shown in the
Bode plot of Figure 7. To achieve a stable circuit with
the Bode plot of Figure 7, follow the procedure below:
1) Choose the R
C
that is equivalent to the inverse of
the transconductance of the error amplifier, 1 / R
C
=
G
EA
= 100µs, or R
C
= 10k
Ω. This sets the high-fre-
quency voltage gain of the error amplifier to 0dB.
2) Determine the maximum output pole frequency:
where R
LOAD(MIN)
= V
OUT
/ I
OUT(MAX)
.
P
V
C
OUT
LOAD MIN
OUT
O(MAX)
OUT
IN
IN
2V
V
2
V
R
=
−
−
(
)
π
(
)
C
P
C O
C
1
2 R
=
π
R
M f
A
P
C
VDC O
C
=
Ω
20
P
C
LOAD MAX
OUT
OUT
O
I
2 V
=
(
)
π
P
C
LOAD MIN
OUT
O
1
2 R
=
π
(
)
f
C
=
f
SW
5
f
Z
1
6 C
E
C
O
=
=
3
π
OUT
SR