Analog front end (afe), 1 data rate generator, 2 write decoder – Rainbow Electronics ATA5575M1 User Manual
Page 3: 3 hv generator, 4 dc supply, 5 power-on reset (por), 6 clock extraction, 7 controller
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9167AS–RFID–11/09
ATA5575M1 [Preliminary]
4.
Analog Front End (AFE)
The AFE includes all circuits which are directly connected to the coil terminals, it generates the
IC’s power supply and handles the bi-directional data communication with the reader. The
AFE consists of the following blocks:
• Rectifier to generate a DC supply voltage from the AC coil voltage
• Clock extractor
• Switchable load between Coil 1 and Coil 2 for data transmission from tag to the reader
• Field-gap detector for data transmission from the base station to the tag
• ESD protection circuitry
4.1
Data Rate Generator
The data rate is fixed to RF/64.
4.2
Write Decoder
The write decoder detects the write gaps and verifies the validity of the data stream according
to the Atmel
®
downlink protocol (pulse interval encoding).
4.3
HV Generator
This on-chip charge pump circuit generates the high voltage required for programming the
EEPROM.
4.4
DC Supply
Power is externally supplied to the IDIC via the two coil connections. The IC rectifies and reg-
ulates this RF source and uses it to generate its supply voltage.
4.5
Power-On Reset (POR)
The power-on reset circuit blocks the voltage supply to the IDIC until an acceptable voltage
threshold has been reached. This, in turn, triggers the default initialization delay sequence.
During this configuration period of 98 field clocks, the ATA5575 is initialized with the configura-
tion data stored in EEPROM byte 16.
4.6
Clock Extraction
The clock extraction circuit uses the external RF signal as its internal clock source.
4.7
Controller
The control logic module executes the following functions:
• Load mode register with configuration data from EEPROM byte 16 after power-on and
during reading
• Controls each EEPROM memory read/write access and handles the data protection
• Handle the downlink command decoding, detecting protocol violations and error conditions