Rainbow Electronics MAX16066 - Manual (Page 47)

12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
MAX16065/MAX16066
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Pause-DR: Shifting of the test data registers halts while
in this state. All test data registers retain their previous
state. The controller remains in this state while TMS is
low. A rising edge on TCK with TMS high puts the con-
troller in the exit2-DR state.
Exit2-DR: A rising edge on TCK with TMS high while
in this state puts the controller in the update-DR state.
A rising edge on TCK with TMS low enters the shift-DR
state.
Update-DR: A falling edge on TCK while in the update-
DR state latches the data from the shift register path of
the test data registers into a set of output latches. This
prevents changes at the parallel output because of changes in the shift register. On the rising edge of TCK,
the controller goes to the run-test/idle state if TMS is low
or goes to the select-DR-scan state if TMS is high.
Select-IR-Scan: All test data registers retain the previ-
ous states. The instruction register remains unchanged
during this state. With TMS low, a rising edge on TCK
moves the controller into the capture-IR state. TMS high
during a rising edge on TCK puts the controller back into
the test-logic-reset state.
Capture-IR: Use the capture-IR state to load the shift
register in the instruction register with a fixed value.
This value is loaded on the rising edge of TCK. If TMS is
high on the rising edge of TCK, the controller enters the
Figure 15. JTAG Block Diagram
TEST ACCESS PORT
(TAP) CONTROLLER
INSTRUCTION REGISTER
[LENGTH = 5 BITS]
BYPASS REGISTER
[LENGTH = 1 BIT]
IDENTIFICATION REGISTER
[LENGTH = 32 BITS]
USER CODE REGISTER
[LENGTH = 32 BITS]
MEMORY ADDRESS REGISTER
[LENGTH = 8 BITS]
MEMORY READ REGISTER
[LENGTH = 8 BITS]
MEMORY WRITE REGISTER
[LENGTH = 8 BITS]
11111
00000
00011
00100
00101
00110
00111
MUX 2 TDO TDI
TMS
TCK
01000
REGISTERS
AND FLASH
01001
01010
01011
01100
MUX 1
00111
01000
01100
01011
01010
01001
REBOOT
SAVE
SETUSRFLSH
RSTFLSHADD
RSTUSRFLSH
SETFLSHADD
COMMAND
DECODER
R PU
V DB