Rainbow Electronics MAX9860 User Manual
Page 22
MAX9860
16-Bit Mono Audio Voice Codec
22
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VOICE (TDM) MASTER MODES:
LRCLK
BCLK
SDOUT
SDIN
L14 L13 L12 L11 L10 L9 L8 L7
L6 L5 L4 L3 L2 L1
L0
1/f
S
CONFIGURED BY BSEL
7ns (typ)
7ns (typ)
L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4
L3 L2 L1 L0
L15
25ns (min)
7ns (typ)
7ns (typ)
0ns (min)
40ns (max)
0ns (min)
L15
RELATIVE TO PCLK (NOTE 8)
_BCI = 0, HIZ = 1, ST = 0
_BCI = 1, HIZ = 1, ST = 0
_BCI = 0, HIZ = 0, ST = 0
LRCLK
BCLK
SDOUT
SDIN
L14 L13 L12 L11 L10 L9 L8
L7 L6 L5 L4 L3 L2 L1
L0
1/f
S
CONFIGURED BY BSEL
7ns (typ)
7ns (typ)
L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4
L3 L2 L1 L0
L15
25ns (min)
7ns (typ)
7ns (typ)
0ns (min)
40ns (max)
0ns (min)
L15
RELATIVE TO PCLK (NOTE 8)
LRCLK
BCLK
SDOUT
SDIN
L14 L13 L12 L11 L10 L9 L8
L7 L6 L5 L4 L3 L2 L1
L0
1/f
S
CONFIGURED BY BSEL
7ns (typ)
7ns (typ)
L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4
L3 L2 L1 L0
L15
25ns (min)
7ns (typ)
7ns (typ)
0ns (min)
40ns (max)
0ns (min)
L15
RELATIVE TO PCLK (NOTE 8)
LRCLK
BCLK
SDOUT
SDIN
L14 L13 L12 L11 L10 L9 L8 L7 L6 L5
L4 L3 L2 L1 L0
1/f
S
CONFIGURED BY BSEL
7ns (typ)
7ns (typ)
L14 L13 L12 L11 L10 L9 L8 L7
L6 L5 L4 L3 L2 L1
L0
L15
25ns (min)
7ns (typ)
7ns (typ)
0ns (min)
40ns (max)
0ns (min)
L15
RELATIVE TO PCLK (NOTE 8)
_BCI = 0, HIZ = 1, ST = 1
R14 R13 R12 R11 R10 R9 R8
R7 R6 R5 R4 R3 R2
R1 R0
R15
R14 R13 R12 R11 R10 R9
R8 R7 R6 R5 R4 R3 R2 R1
R0
R15
NOTE 8: THE DELAY FROM A BCLK EDGE AND AN LRCLK EDGE IS DETERMINED BY LENGTH OF TIME THAT PCLK (THE INTERNALLY DIVIDED DOWN VERSION OF MCLK AS DEFINED BY THE PSCLK BITS) IS HIGH DURING
ONE PERIOD OF MCLK PLUS THE INTERNAL DELAY. FOR EXAMPLE: IF PCLK = 12.288MHz, THE DELAY BETWEEN BCLK AND LRCLK IS TYPICALLY 45ns.
Figure 2. Digital Audio Interface Voice Master Mode Examples