Pch 7591, Chapter 3, 1 operations after post screen – Acnodes PCH 7591 User Manual
Page 30: 15 inch atom fanless panel pc
PCH 7591
15 inch Atom Fanless Panel PC
© Copyright 2012 Acnodes, Inc.
All rights reserved. Product description and product specifications
are subject to change without notice. For latest product information,
please visit Acnodes’ web site at www.acnodes.com.
14628 Central Ave.
Chino, CA91710
Tel:909.597.7588, Fax:909.597.1939
Chapter 3
3.1 Operations after POST Screen
After CMOS dis charge or BIO S flashing operation, the s ystem will display the following screen for your
fu rther operation. Pres s F1 key to continue or Del key to enter CMOS Setup.
Phoeni x – AwardBIOS v6.00PG, An Energy Star Ally
Copyright © 1984-2007, Phoenix Technologies, LTD
ASB-L701 V019
Main Processor : Intel® Atom™ 1.60GHz(133x12)
Memory Testing :515008K OK + 8M shared memory
CPU Brand Name : Intel® Atom™ CPU N270
C1E BIOS Supported
Hyper-Threading Technology CPU Detected (Hyper-Threading Technology
Enabled
)
Memory Frequency For
DDR 2 533
IDE Channel 0 Mas ter : None
IDE Channel 0 Slave : None
IDE Channel 1 Mas ter : None
IDE Channel 1 Slave : None
CMOS checksum error – Defaults loaded
Press
F1
to continue,
DEL
to enter SETUP
08/14/2010-Silverthrone-6A79KAPXC-00
After optimizing an d e xiting CMOS Setup, the PO ST screen display ed f or the first time is as follows
a nd includes bas ic information on BIOS, C PU , memory, and storage d evices.
Phoeni x – AwardBIOS v6.00PG, An Energy Star Ally
Copyright © 1984-2007, Phoenix Technologies, LTD
ASB-L701 V019
Main Processor : Intel® Atom™ 1.60GHz(133x12)
Memory Testing :515008K OK + 8M shared memory
CPU Brand Name : Intel® Atom™ CPU N270
C1E BIOS Supported
Hyper-Threading Technology CPU Detected (Hyper-Threading Technology
Enabled
)
Memory Frequency For
DDR2 533
IDE Channel 0 Master : None
IDE Channel 0 Slave
: None
IDE Channel 1 Master : None
IDE Channel 1 Slave : None
Press
DEL
to enter SETUP,
F12
to Enter Boot Menu
08/14/2010-Silverthrone-6A79KAPXC-00
Press F12 key to enter Boot Menu during POST, as s ho wn by the follow ing figure.
Boot Menu
== Select a Boot First device ==