Index, Ndex – VXI VM4016 User Manual
Page 95
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VM4016 Index
95
I
NDEX
*
*CLS ...............................................................................................54
*ESE ...............................................................................................55
*ESR? .............................................................................................56
*IDN? .............................................................................................57
*OPC...............................................................................................58
*RST
.........................................................................................52, 59
*SRE ...............................................................................................60
*STB? .............................................................................................61
*TRG ..............................................................................................62
*TST? .............................................................................................63
*WAI ..............................................................................................64
B
backplane jumpers ....................................................................15, 16
C
CLS .................................................................................................50
Command Dictionary .....................................................................53
cooling ............................................................................................15
D
debounce circuitry ..............................................................37, 39, 40
direct register access.................................................................42, 43
Direct Register Access ...................................................................41
E
ESE .................................................................................................50
ESR? ...............................................................................................50
F
FETCh:CONDitioned? .....................................................19, 51, 65
FETch:LATChed?.........................................................................20
FETCh:LATChed? ...................................................................51, 66
FETCh:RAW? ..........................................................................51, 67
FETCH:RAW? ..............................................................................21
I
IDN? ...............................................................................................50
INHOUSE:CLEAR_LATCH ............................................25, 51, 68
INHOUSE:PSEUDO.........................................................22, 51, 69
INHOUSE:REG_ENABLE ..............................................24, 51, 71
INHOUSE:REGINT .........................................................23, 51, 70
Input Range.........................................................................77, 90, 91
input voltage ...................................................................................93
INPut:DEBounce ..............................................................26, 51, 72
INPut:MASK......................................................................27, 51, 73
INPut:MASK:INTerrupt ...................................................28, 51, 74
INPut:OFFSet ...................................................................29, 51, 75
INPut:POLarity .................................................................30, 51, 76
INPut:RANGe....................................................................31, 51, 77
interrupt generation ........................................................................93
interrupts.........................................................................................89
L
latched register ...............................................................................89
logical address ..........................................................................15, 16
M
mask register circuitry..............................................................37, 40
O
OPC ................................................................................................50
OUTPut:POLarity:EXTernal:INTerrupt.........................32, 51, 78
OUTPut:POLarity:EXTernal:INTerrupt NORM...........................34
OUTPut:POLarity:EXTernal:LATChed..........................33, 51, 79
P
power ............................................................................15, 16, 35, 56
pseudo register access ....................................................................43
R
Register Access Examples .............................................................41
relay drivers........................................................................36, 39, 90
RST
..........................................................................................50, 51
S
SCPI................................................................................................34
signal comparison...........................................................................92
SRE.................................................................................................50
STATus:OPERation:CONDition? ...........................................52, 80
STATus:OPERation:ENABle..................................................52, 81
STATus:OPERation[:EVENt]? ...............................................52, 82
STATus:PRESet.......................................................................52, 83
STATus:QUEStionable:.................................................................52
STATus:QUEStionable:CONDition? ............................................84
STATus:QUEStionable:ENABle.............................................52, 85
STATus:QUEStionable\[
EVENt].....................................................................................86
STATus:QUEStionable[:EVENt]? ................................................52
STB?...............................................................................................50
SYSTem:ERRor? .....................................................................52, 87
SYSTem:VERsion?........................................................................52
SYSTem:VERSion? .......................................................................88
T
TST .................................................................................................50
V
VMIP ..........................................................11, 12, 16, 37, 40, 89, 90
VXIbus .................................................11, 12, 15, 16, 65, 66, 73, 89
VXIplug&play Driver Examples ...................................................44
W
WAI ................................................................................................50
WEEE ............................................................................................... 7