Figure 4-3. module states – VXI VT1422A User Manual
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Programming the VT1422A for Data Acquisition and Control 103
Before IN IT
After INIT
Com mands Accepted:
Com mands Accepted:
Trigger Idle
State
Waiting for
Trigger State
Input,
Execute Algs,
Output
*RST or ABORT?
no
no
yes
yes
Trig Count
Exhausted?
All com m ands exept:
*TRG , TRIGGER, and ALG:UPD:CHAN
INITiate[:IM M]
Power-On
*RST
ABO RT
M ost of ALG subsystem
ARM [:IM M ]
FETCH?
FORM AT
SENSe:DATA ...
STATus ...
SYSTem ...
*TRG & TRIG ger[:IM Mediate] (if TRIG:SOUR is HO LD)
TIMer or other
trigger event
Figure 4-3. Module States
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