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1 module id and revision register (midr), 2 ddr2 memory controller status register (dmcstat), Midr) – Texas Instruments TMS320C6452 DSP User Manual

Page 37: Dmcstat), Descriptions, Section 4.1, Section 4.2

1 module id and revision register (midr), 2 ddr2 memory controller status register (dmcstat), Midr) | Dmcstat), Descriptions, Section 4.1, Section 4.2 | Texas Instruments TMS320C6452 DSP User Manual | Page 37 / 46 1 module id and revision register (midr), 2 ddr2 memory controller status register (dmcstat), Midr) | Dmcstat), Descriptions, Section 4.1, Section 4.2 | Texas Instruments TMS320C6452 DSP User Manual | Page 37 / 46
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