LSI U160 - Manual (Page 17)

3.75 pc 10.25 pc 11.25 pc 38.25 pc
4.333 pc
48.583 pc
52.5 pc
34.5 pc
44.25 pc
Interface Descriptions 1-5
1.3 Interface Descriptions
This section provides a more detailed explanation about the PCI
Interface, the SCSI Interface, Ultra160 SCSI Technology, and LVDlink
Technology.
1.3.1 The PCI Interface
PCI, a high-speed standard local bus, interfaces I/O components to the
processor and memory subsystems in equipment ranging from PCs to
servers. The PCI functionality for the LSIU160 is contained within the
LSI53C1010. The LSI53C1010 connects directly to the PCI bus and
generates signal timing and bus protocol in compliance with the PCI
Specification Revision 2.2.
The PCI interface operates as a 64-bit DMA bus master capable of
64-bit addressing. The connection is made through edge connector J1,
shown in
Figure 2.1 on page 2-5 . The signal definitions and pin numbers
conform to the PCI Local Bus Specification Revision 2.2 standard. The
LSIU160 conforms to the PCI universal signaling environment for a 5 V
or 3.3 V PCI bus.
1.3.2 The SCSI Interface
The SCSI functionality for the LSIU160 is contained within the
LSI53C1010. This chip is a PCI to Ultra160 SCSI Controller with LVDlink
Universal Transceivers. It connects directly to the SCSI bus and
generates signal timing and bus protocol in compliance with SCSI
standards.
The SCSI interface on the LSIU160 operates as an 8-bit or 16-bit
interface. It supports 8-bit or 16-bit, synchronous and asynchronous, LVD
or SE, Fast, Ultra, Ultra2, and Ultra160 SCSI protocols in various
combinations. The interface is made through connectors J3 and J4 (see
Figure 2.1 ). Internal connector J4 is a 68-pin HD right angle latching
connector. External connector J3 is a shielded 68-pin HD right angle
connector exposed in the back panel bracket. LVD/SE dual mode, active
termination is provided on the LSIU160. Termination is automatically
disabled when both SCSI connectors are used. The LSIU160 supplies
SCSI bus TERMPWR through a blocking diode and a self-resetting 1.5 A
short circuit protection device. A 40 MHz oscillator is installed on the