Intel Itanium 2 Processor - Manual (Page 80)

80 Datasheet
System Management Feature Specifications
Figure 6-1. Logical Schematic of SMBus Circuitry
NOTE:
1. Actual implementation may vary.
2. For use in general understanding of the architecture.
000668b
Processor
Information
ROM
A0
A1
A2
SC
SD
V
CC
10K 10K
3.3V
Scratch
EEPROM
A0
A1
A2
SD
WP
V
CC
SC
10K
10K
10K
Thermal
Sensing
Device
VCC
A0
A1
SC
SD
STBY
ALERT
SMA0
SMA1
SMA2 3.3V
SMSD
SMSC THRMALERT#
Core
THERMDA
THERMDC
Stuffing
Options
3.3V
System Board
10K
SMWP
System Board
3.3V
10K
Intel ® Itanium ® 2 Processor