System architecture, Figure 3-3 – Intel SGI Altix 450 User Manual
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3: System Overview
Figure 3-3
Blade, IRU and Rack Components
System Architecture
The Altix 450 computer system is based on a distributed shared memory (DSM) architecture. The
system uses a global-address-space, cache-coherent multiprocessor that scales up to 76 Intel 64-bit
processor cores in a single rack. Because it is modular, the DSM combines the advantages of lower
entry cost with the ability to scale processors, memory, and I/O independently.
The system architecture for the Altix 450 system is a fourth-generation NUMAflex DSM
architecture known as NUMAlink 4. In the NUMAlink 4 architecture, all processors and memory
are tied together into a single logical system with special crossbar switches (routers). This
combination of processors, memory, and crossbar switches constitute the interconnect fabric
called NUMAlink. There are two internal router switches on each 5U IRU enclosure.
The basic expansion building block for the NUMAlink interconnect is the processor node; each
processor node consists of a Super-Hub (SHub) ASIC and one or two 64-bit processors with three
levels of on-chip secondary caches. The Intel 64-bit processors are connected to the SHub ASIC
via a single high-speed front side bus.
The SHub ASIC is the heart of the processor and memory node blade technology. This specialized
ASIC acts as a crossbar between the processors, local SDRAM memory, and the network
Blade
Individual Rack Unit (IRU)
(Contains 5 blades)
Rack
(Contains 4 IRUs)
Blade slot 0
Blade slot 1
Blade slot 2
Blade slot 3
Blade slot 4
inside
TM
inside
TM
inside
TM
inside
TM
inside
TM