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Fr-v family, Companion – FUJITSU Semiconductor User Manual

Page 258

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257

FR-V Family

FR

-V

Fa

mi

ly

FR-V Family

CPU

* : instruction set ( I : Integer, F : Floting, M : Media, B : Branch)

: Under development

Companion

Series

name

Part number

Operating

power

supply

voltage

Package

Functions

Peripherals

VLIW

issues *

operation

frequency

(MHz)

Register

Cache

Peak

performance

FR400

MB93403

External :
3.3 V

±

0.15 V
Internal :
1.8 V

±

0.09 V

PBGA 256P

2way
(I, I, M, M,
B)

266/
200

32b

×

32w

(5R/3W)

Inst : 8KB/
2way (1RW)
Data : 8KB/
2way (1RW)
Single Load
Single Store
Non-Blocking

532MIPS
2128MOPS

SDRAMC
IRC
UART/
TIMER
DMAC
GPIO

FR550

MB9355X

External :
3.3 V

±

0.15 V
Internal :
1.3 V

±

0.05 V

BGA 352P

8way
(I, I, I, I, F,
F, F, F, F
M, M, M,
M, B, B)

333MHz/
300MHz

32b

×

64w

(10R/6W)

Inst : 32KB/
4way (1RW)
Data : 32KB/
4way (2RW)
Dual Load
Dual Store
Non-Blocking

1332MIPS
7992MOPS
1332MFLOPS

SDRAMC
IRC
UART/
TIMER
DMAC
GPIO

Series name Part number

Operating

power supply

voltage

Package

Functions

MB9349X

MB93493

3.3 V

±

0.15 V PBGA 256P

Video input and output (progressive/ interlace correspondence)
Audio input and output (3 line type serial and PCM highway corre-
spondence)
PCMCIA (PCMCIA2.1/JEIDA4.2 conformity)
USB (USB 1.1 conformity function)
I

2

C (100 Kbps, 400 Kbps)

GPIO (40 bit)