3 cpu configuration – Habey BIS-6590 User Manual

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4.2.3 CPU Configuration

CPU Configuration

Intel(R) Core(TM) i7-3770 CPU @ 3.40GHZ

CPU Signature 306a8

Microcode Patch

Max CPU Speed

3400 MHZ

Min CPU Speed

1600 MHZ

CPU Speed

3400 MHZ

Processor Cores

Intel HT Technology

Supported

Intel VT-x Technology

Supported

Intel SMX Technology

Supported

64-bit

Supported

L1 Data cache

32 KB x 4

L1 Data cache

32 KB x 4

L2 cache

256 KB x 4

L2 cache

8192 KB

Hyper threading

[Enabled]

Active Processor Cores

[All]

Limit CPUID Maximum

[Disabled]

Execute Disable Bit

[Enabled]

Intel Virtualization Technology [Disabled]

Hardware Prefetcher

[Enabled]

Adjacent Cache Line Prefetch [Enabled]

CPU PPM Configuration

Enabled for Windows

XP and Linux (OS

optimized for Hy-

per-Threading Tech-

nology) And Disabled

for other OS (OS not

optimized for Hyper

Threading Technolo-

gy). When Disabled

only one thread Per

enabled core is en-

abled
→←: Select Screen
↑↓: Select Item
Enter: Select
+/-: Change Option
F1: General Help
F2: Previous Value
F9: Optimize Defaults
F10: Save & Exit
ESC: Exit

Hyper-threading

This option is configured to activate or deactivate the CPU Hyper Thread-

ing Technology. Intel® Hyper-Threading Technology uses resources ef-

ficiently, enabling multiple threads to run on each core, and increasing

processor throughput.

Execute Disable Bit

Execute Disable Bit (EDB) is a hardware-based security feature that in-

troduced to its new generation CPU by Intel, which can help reduce sys-

tem exposure to viruses and malicious code. EDB allows the processor to

classify areas in memory where application code can or

cannot execute.

To use Execute Disable Bit you must have Windows XP SP2 operating

system to support this function.