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Slave address, Acknowledge, Write data format – Rainbow Electronics MAX98088 User Manual

Page 113: Slave address acknowledge write data format

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Stereo Audio Codec

with FLEXSOUND Technology

MAX98088

113

Slave Address

The slave address is defined as the seven most signifi-
cant bits (MSBs) followed by the read/write bit. For the
IC, the seven most significant bits are 0010000. Setting
the read/write bit to 1 (slave address = 0x21) configures
the IC for read mode. Setting the read/write bit to 0 (slave
address = 0x20) configures the ICs for write mode. The
address is the first byte of information sent to the IC after
the START condition.

Acknowledge

The acknowledge bit (ACK) is a clocked 9th bit that the
IC uses to handshake receipt each byte of data when
in write mode (Figure 34). The IC pulls down SDA dur-
ing the entire master-generated 9th clock pulse if the
previous byte is successfully received. Monitoring ACK
allows for detection of unsuccessful data transfers. An
unsuccessful data transfer occurs if a receiving device

is busy or if a system fault has occurred. In the event
of an unsuccessful data transfer, the bus master retries
communication. The master pulls down SDA during the
9th clock cycle to acknowledge receipt of data when
the IC is in read mode. An acknowledge is sent by the
master after each read byte to allow data transfer to
continue. A not acknowledge is sent when the master
reads the final byte of data from the IC, followed by a
STOP condition.

Write Data Format

A write to the IC includes transmission of a START condi-
tion, the slave address with the R/W bit set to 0, one byte
of data to configure the internal register address pointer,
one or more bytes of data, and a STOP condition. Figure
35 illustrates the proper frame format for writing one byte
of data to the IC. Figure 35 illustrates the frame format for
writing n-bytes of data to the IC.

Figure 34. Acknowledge

Figure 35. Writing One Byte of Data to the ICs

Figure 36. Writing n-Bytes of Data to the ICs

1

SCL

START

CONDITION

SDA

2

8

9

CLOCK PULSE FOR

ACKNOWLEDGMENT

ACKNOWLEDGE

NOT ACKNOWLEDGE

1 BYTE

AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER

ACKNOWLEDGE FROM MAX98088/

MAX98089

B7

B6

B5

B4

B3

B2

B1

B0

ACKNOWLEDGE FROM MAX98088/

MAX98089

ACKNOWLEDGE FROM MAX98088/

MAX98089

S

O

A

A

A

P

SLAVE ADDRESS

R/W

REGISTER ADDRESS

DATA BYTE

ACKNOWLEDGE FROM MAX98088/

MAX98089

SLAVE ADDRESS

REGISTER ADDRESS

DATA BYTE 1

AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER

1 BYTE

ACKNOWLEDGE FROM MAX98088/

MAX98089

ACKNOWLEDGE FROM MAX98088/

MAX98089

ACKNOWLEDGE FROM MAX98088/

MAX98089

B7 B6 B5 B4 B3 B2 B1 B0

B7 B6 B5 B4 B3 B2 B1 B0

S

O

A

A

A

DATA BYTE n

1 BYTE

P

A

R/W