Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream Instruction Manuals and User Guides

We have 1 Instruction Manual and User Guide for Mentor Verification IP Altera Edition AMBA AXI4-Stream Altera

Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream User Manual, 231 pages

Recognized languages:	English
Pages:	231
Size:	1.07 MB

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Document Outline

Table of Contents
List of Examples
List of Figures
List of Tables
Preface
- About This User Guide
- AMBA AXI4-Stream Protocol Specification
- Mentor VIP AE License Requirements
- Supported Simulators
- Simulator GCC Requirements
Chapter 1 Mentor VIP Altera Edition
- Advantages of Using BFMs and Monitors
- Implementation of BFMs
- What Is a Transaction?
- AXI4-Stream Transactions
  - Master BFM and Slave BFM Roles
Chapter 2 SystemVerilog API Overview
- Configuration
  - set_config()
  - get_config()
- Creating Transactions
  - Transaction Record
    - Transaction Definition
  - create_*_transaction()
- Executing Transactions
  - execute_transaction()
- Waiting Events
  - wait_on()
  - get_packet(), get_transfer()
- Access Transaction Record
  - set*()
  - get*()
- Operational Transaction Fields
Chapter 3 SystemVerilog Master BFM
- Master BFM Protocol Support
- Master Timing and Events
- Master BFM Configuration
- Master Assertions
- SystemVerilog Master API
Chapter 4 SystemVerilog Slave BFM
- Slave BFM Protocol Support
- Slave Timing and Events
- Slave BFM Configuration
- Slave Assertions
- SystemVerilog Slave API
Chapter 5 SystemVerilog Monitor BFM
- Inline Monitor Connection
- Monitor BFM Protocol Support
- Monitor Timing and Events
- Monitor BFM Configuration
- Monitor Assertions
- SystemVerilog Monitor API
Chapter 6 SystemVerilog Tutorials
- Verifying a Slave DUT
  - Master BFM Test Program
    - Initial Block
- Verifying a Master DUT
  - Slave BFM Test Program
    - Basic Slave Test Program API Definition
      - m_insert_wait
      - ready_delay()
    - Advanced Slave Test Program API Definition
      - initial block()
Chapter 7 VHDL API Overview
- Configuration
  - set_config()
  - get_config()
- Creating Transactions
  - Transaction Record
    - Transaction Definition
  - create*_transaction()
- Executing Transactions
  - execute_transaction()
- Waiting Events
  - wait_on()
  - get_packet(), get_transfer()
- Access Transaction Record
  - set*()
  - get*()
- Operational Transaction Fields
Chapter 8 VHDL Master BFM
- Overloaded Procedure Common Arguments
- Master BFM Protocol Support
- Master Timing and Events
- Master BFM Configuration
- Master Assertions
- VHDL Master BFM API
Chapter 9 VHDL Slave BFM
- Slave BFM Protocol Support
- Slave Timing and Events
- Slave BFM Configuration
- Slave Assertions
- VHDL Slave BFM API
Chapter 10 VHDL Monitor BFM
- Inline Monitor Connection
- Monitor BFM Protocol Support
- Monitor Timing and Events
- Monitor BFM Configuration
- Monitor Assertions
- VHDL Monitor BFM API
Chapter 11 VHDL Tutorials
- Verifying a Slave DUT
  - Master BFM Test Program
    - Traffic Generation
- Verifying a Master DUT
  - Slave BFM Test Program
    - Basic Slave Test Program API Definition
      - m_insert_wait
      - ready_delay()
    - Advanced Slave Test Program API Definition
      - initial block()
Chapter 12 Getting Started with Qsys and the BFMs
- Setting Up a Simulation from a UNIX Platform
- Setting Up Simulation from the Windows GUI
  - Running the Qsys Tool
  - Running a Simulation
Chapter 13 Assertions
Appendix A SystemVerilog Master and Slave Test Programs
- SystemVerilog Master Test Program
- SystemVerilog Slave Test Program
Appendix B VHDL Master and Slave Test Programs
- VHDL Master BFM Code Example
- VHDL Slave BFM Code Example
Third-party Software for Mentor Verification IP Altera Edition
End-User License Agreement

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