Epson 6200A - Manual (Page 78)

Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
72 EPSON S1C6200/6200A CORE CPU MANUAL
3 INSTRUCTION SET
RCF
Reset carry flag
RCF
C
←
0
1 1 1 1 0 1 0 1 1 1 1 0 F5EH
VI
7
Reset
Not affected
Not affected
Not affected
Resets the C (carry) flag.
ADD A,4 RCF
A register 1101 0001 0001
C flag 0 1 0
RDF Reset decimal flag
RDF
D
←
0
1 1 1 1 0 1 0 1 1 0 1 1 F5BH
VI
7
Not affected
Not affected
Reset
Not affected
Resets the D (decimal) flag.
ADD A,8 RDF LD A,6 ADD A,8
A register 0110 0100 0100 0110 1110
D flag 1 1 0 0 0
C flag 0 1 1 1 0
Z flag 0 0 0 0 0