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Avago Technologies ACPL-339J-000E User Manual

Page 6

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6

a) Operations of various outputs

The outputs (V

OUTP

, V

OUTN

, V

GMOS

and FAULT) of each ACPL-339J are governed by the combination of I

F

(the LED

current), UVLO and DESAT conditions. Once the UVLOP+ and UVLON– signals are not active (V

CC2

- V

E

> V

UVLOP+

, V

E

- V

EE

> V

UVLON+

), V

OUTP

is allowed to go low and V

OUTN

is allowed to go high. Thereafter, the DESAT (pin 15) detection feature

of the ACPL-339J will be the primary source of IGBT/Power MOSFET protection. DESAT will remain functional until V

CC2

-

V

E

is decreased below V

UVLOP-

or V

E

- V

EE

is decreased below V

UVLON-

. Therefore, the DESAT detection and UVLO features

of the ACPL-339J work alternatively to ensure constant IGBT/MOSFET protection.
Table 1 shows the possible output combinations for Fault, V

outp

, V

outn

and V

gmos

under the influence of different UVLO

and DESAT operating conditions, whether they are active or not.

Table 1

I

F

UVLOP and UVLON

DESAT Function

Pin 7 (FAULT) Output

V

OUTP

V

OUTN

V

GMOS

X

Active

Not Active

High

High

Low

V

E

ON

Not Active

Active (with DESAT fault)

High

High

Low

V

E

ON

Not Active

Active (no DESAT fault)

Low

Low

High

V

EE

OFF

Not Active

Not Active

Low

High

Low

V

EE

Note:

Normal operating condition is highlighted in blue in the table; X denotes Don’t Care; Logic output of V

GMOS

will be changed from V

EE

to V

E

when

UVLON is active. This will ensure that MN3 is turned on to shut down the IGBT/SiC FET when insufficient power supply V

E

-V

EE

is applied.

b) Soft-shutdowns from DESAT and UVLO faults

The DESAT pin of each device monitors its IGBT V

ce

voltage. The internal DESAT fault detection circuitry must remain

disabled for a short time period following the turn-on of the IGBT to allow the collector voltage to fall below the DESAT

threshold. This time period, called the DESAT blanking time, is controlled by the internal DESAT charge current, the

DESAT voltage threshold, and the external DESAT blanking capacitor (C8, at 100 pF). The nominal blanking time is

calculated in terms of external capacitance (C

BLANK

), FAULT threshold voltage (V

DESAT

), and DESAT charge current (I

CHG

)

as T

BLANK

= C

BLANK

× V

DESAT

/ I

CHG

. The nominal blanking time with the recommended 100 pF capacitor is 100 pF * 8 V /

250 µA = 3.2 µsec. This nominal blanking time also represents the longest time it will take for each ACPL-339J to respond

to a DESAT fault condition. After T

BLANK

time, both V

OUTP

and V

OUTN

outputs will turn off the respective external Q1 and

Q2 MOSFETs and V

GMOS

switches from Low to High, turning on an external Q3 pull-down MOSFET, to ‘softly’ turn off the

IGBT. Also activated is an internal feedback channel that brings the isolated FAULT output from Low to High to notify the

microcontroller of the fault condition.
Once fault is detected, the output will be muted for T

MUTE

time. All input LED signals will be ignored during the mute

period to allow the driver to completely do a soft shutdown of the IGBT. The fault is auto-reset upon the 1 ms (typical)

mute time (T

MUTE

) timeout or upon the change in IN1 status from High to Low transition, whichever is later. In this way

there is a minimum timeout, yet there is still flexibility of lengthening the timeout.
When a DESAT fault is detected, its device’s V

GMOS

output switches from Low to High, turning on the external Q3 MOSFET

pull-down device. Q3 slowly discharges the IGBT gate voltage at a decay rate corresponding to the RC constant of RS

and C

IN

(the IGBT input capacitance). Based on a RS of 330

Ω (as in R10) and C

IN

of 10 nF(from the external connected

capacitor at Q5 or Q6), the entire soft shut down will decay in 4.8 * 330

Ω * 10 nF = 15.8 µs. Soft shutdown prevents fast

changes of the collector current that could cause damaging voltage spikes due to lead and wire inductance. Similarly,

when under voltage operation occurs during normal operation, its device’s V

GMOS

output switches from Low to High,

turning on the external Q3 MOSFET pull-down device. Q3 slowly discharges the IGBT gate voltage at a decay rate

corresponding to the RC constant of RS and C

IN

(the IGBT input capacitance). The entire soft shutdown will decay in 15.8

µs to prevent fast changes in the collector current.