Detail register descriptions – Lanner RS12-38800 User Manual
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2005/6/22 3:21:00 PM
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Detail Register Descriptions
A watchdog action consists of a series of watchdog instructions. A watchdog instruction is the
operation on a register region. This section describes the detail register in LPC I/O(W83627HF).
Watch Dog Timer Control Register
Watch Dog Timer is controlled by CRF5, CRF6, CRF7 of Logical Device.
CRF5 (PLED mode register. Default 0x00)
Bit 7-6 : select PLED mode
= 00 Power LED pin is tri-stated.
= 01 Power LED pin is drived low.
= 10 Power LED pin is a 1Hz toggle pulse with 50 duty cycle
= 11 Power LED pin is a 1/4Hz toggle pulse with 50 duty cycle.
Bit 5-4 : Reserved
Bit 3 : select WDTO count mode.
= 0 second
= 1 minute
Bit 2 : Enable the rising edge of keyboard Reset(P20) to force Time-out event.
= 0 Disable
= 1 Enable
Bit 1-0 : Reserved
CRF6 (Default 0x00)
Watch Dog Timer Time-out value. Writing a non-zero value to this register
causes the counter toload the value to Watch Dog Counter and start counting
down. If the Bit 7 and Bit 6 are set, anyMouse Interrupt or Keyboard Interrupt
event will also cause the reload of previously-loaded non-zerovalue to Watch
Dog Counter and start counting down. Reading this register returns current
value inWatch Dog Counter instead of Watch Dog Timer Time-out value.
Bit 7 - 0 = 0x00 Time-out Disable
= 0x01 Time-out occurs after 1 second/minute
= 0x02 Time-out occurs after 2 second/minutes
= 0x03 Time-out occurs after 3 second/minutes
= 0xFF Time-out occurs after 255 second/minutes