Lanner RS12-38800 - Manual (Page 56)

RS12-38800
56
B. Appendix B: Watchdog Timer
B.1 Introduction
Most systems need to be self-reliant. If an error should occur it is typically
not possible to wait for the system to be rebooted manually. In some cases,
the system is simply not accessible to human operators. If such systems
should ever hang, they would be permanently disabled. In other cases, the
speed at which a human operator would reset the system would be too slow
to meet the uptime requirements of the product.
A watchdog timer is a piece of hardware that can be used to automatically
detect system anomalies and reset the processor in the case any problems
are found. Generally speaking, a watchdog timer is based on a counter that
counts down from an initial value to zero. The software selects the counter's
initial value and periodically restarts it. Should the counter reach zero
before the software restarts it, the software is presumed to be
malfunctioning, and the processor's reset signal is asserted. Thus, the
processor will be restarted as if a human operator had cycled the power.
Note: The watchdog function is the Intel 82571EB. Lanner provides sample
codes in the Manual/ Driver CD under the path:// WATCHDOG
刪除 刪除 刪除 刪除 : Detail Register
Descriptions
A watchdog action consists
of a series of watchdog
instructions. A watchdog
instruction is the operation
on a register region. This
section describes the detail
register in LPC
I/O(W83627HF).
Watch Dog Timer Control
Register
Watch Dog Timer is
controlled by CRF5, CRF6,
CRF7 of Logical Device.
CRF5 (PLED mode
register. Default 0x00)
Bit 7-6 : select PLED mode
= 00 Power LED pin is
tri-stated.
= 01 Power LED pin is drived
low.
= 10 Power LED pin is a 1Hz
toggle pulse with 50 duty
cycle
= 11 Power LED pin is a
1/4Hz toggle pulse with 50
duty cycle.
Bit 5-4 : Reserved
Bit 3 : select WDTO count
mode.
= 0 second
= 1 minute
Bit 2 : Enable the rising edge
of keyboard Reset(P20) to
force Time-out event.
= 0 Disable
= 1 Enable
Bit 1-0 : Reserved
CRF6 (Default 0x00)
Watch Dog Timer Time-out
value. Writing a non-zero
value to this register causes
the counter toload the value
to Watch Dog Counter and
start counting down. If the
Bit 7 and Bit 6 are set,
anyMouse Interrupt or
Keyboard Interrupt event
will also cause the reload of
previously-loaded
non-zerovalue to Watch Dog
Counter and start counting
down. Reading this register
returns current value
inWatch Dog Counter
instead of Watch Dog Timer
Time-out value.
Bit 7 - 0 = 0x00 Time-out
Disable
= 0x01 Time-out occurs
after 1 second/minute
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