Grass Valley 2010RDA-16 - Manual (Page 25)

2010RDA-16 Instruction Manual 25
Functional Description
Functional Description
The 2010RDA-16 module reclocks and distributes AES/EBU digital audio
to sixteen outputs. The modules are configured with jumpers to operate in
single or dual mode.
Figure 15. 2010RDA -16 Block Diagram
AES Receivers
Each channel of AES3 audio is fed to the modules through an isolation
transformer into a crystal receiver IC where the data is reclocked by means
of a phase-locked-loop (PLL). Each AES Receiver controls the LOCK LEDs
which indicate when the receiver IC is locked to an incoming data stream.
The reclocked signal is then fed to the FPGA for routing and control.
8268_04
FPGA
Routing and Control
Processor
Coax PRM Midplane 2010RDA-16 Module
AES Receiver
AES Receiver
Power Supply
J1
J10
J3
J4
J5
J9
J6
J7
J8
J11
J13
J15
J17
J18
CH 1 In
CH 2 In
J2
LOCK 2 LED
LOCK 1 LED
FAULT LED
Configuration
Jumper
PWR LED
+5V
+3.3V
+24V
COMM LED
CONF LED
CH 2
Out
Dual
Mode
CH 1
Out
Dual
Mode
CH 1
Out
Single
Mode
Controller
J12
J16
J14