Sundance SMT791 - Manual (Page 8)

4 Functional Description
4.1 System Overview
The following diagram shows the block diagram of the SMT791.
4.1.1 Board Assembly
The daughter-card interface is made up of two connectors. One is a 0.5mm pitch
differential Samtec connector. This connector is for transferring the ADC LVDS
output data to the FPGA on the main board. The second one is a 1mm pitch Samtec
header type connector. This connector is for providing power to the daughter-card.
The figure underneath illustrates this configuration. The bottom view of the
daughter card is shown on the right. This view must the mirrored to understand
how it connects to the main board.
Bank A Bank B BankC
Data Connectors
Power Connectors
Figure 1: SMT391 Connectors
4.1.2 Presentation of the boards interface
Bank A on the connector is used for the ADC I Channel data bus. Bank C is used for
the ADC Q channel data bus. Bank B is used for system clock and trigger signals,
ADC control signals and general system control signals. The general system control
signals include: PLL control interface (for the VCO circuit), clock synthesizer control,
ADC control, power control signals and daughter card reset signal. All reserved
signals are connected to the FPGA on the main module for future expansion.
User Manual SMT791 Page 8 of 8 Last Edited: 12/10/2010 09:52:00