Header pinout – Sundance SMT498 User Manual
Page 22
Header Pinout
PCI
A 66MHz 64-bit PCI bridge will allow SMT498 to communicate with the host system.
As the Local Bus has a maximum clock speed of 64MHz, the maximum theoretical
speed data can be transferred between the host and FPGA is 512MB/s.
PMC PCI connectors are directly connected to the QuickLogic 5064 bridge chip.
PMC P14 must be 5V tolerant.
P11
P12
Pin # Signal name Signal name Pin # Pin # Signal name
Signal name Pin #
1 TCK
-12V
2
1 +12V
TRSTN
2
3 GND
INTAN
4
3 TMS
TDO
4
5 INTBN
INTCN
6
5 TDI
GND
6
7 BUSMODE1
N
+5V 8
7 GND
PCI-RSVD*
8
9 INTDN
PCI-RSVD*
10
9 PCI-RSVD*
PCI-RSVD*
10
11 GND
3.3Vaux
12
11 BUSMODE2N +3.3V
12
13 CLK
GND
14
13 RSTN
BUSMODE3
N
14
15 GND
GNTN
16
15 +3.3V
BUSMODE4
N
16
17 REQN
+5V
18
17 PMEN
GND
18
19 VIO
AD31
20
19 AD30
AD29
20
21 AD28
AD27
22
21 GND
AD26
22
23 AD25
GND
24
23 AD24
+3.3V
24
25 GND
C/BE3N
26
25 IDSEL
AD23
26
27 AD22
AD21
28
27 +3.3V
AD20
28
29 AD19
+5V
30
29 AD18
GND
30
31 VIO
AD17
32
31 AD16
C/BE2N
32
33 FRAMEN
GND
34
33 GND
PMC-RSVD
34
35 GND
IRDYN
36
35 TRDYN
+3.3V
36
37 DEVSELN
+5V
38
37 GND
STOPN
38
39 GND
LOCKN
40
39 PERRN
GND
40
41 PCI-RSVD*
PCI-RSVD*
42
41 +3.3V
SERRN
42
43 PAR
GND
44
43 C/BE1N
GND
44
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