Sundance SMT498 - Manual (Page 10)

QL5064
The PCI bridge chip from QuickLogic is installed on a SMT498.
This device combines a 66MHz/64-bit PCI Master/Target ASIC core with a one-time
programmable (OTP) FPGA fabric.
The configuration of the FPGA fabric in the QL5064 is performed prior to
manufacturing of the module and cannot be changed by the user.
Local bus
QL5064 provides a bridge between the PCI bus of the host system and the Local
bus of the SMT498. This interface will allow software on the host PC to transfer data
to and from the other interfaces in this design. The interface between the FPGA and
PCI bridge is clocked at a speed of 64MHz with a data bus width of 64 bits.
There are two primary functions of the Local bus on SMT498:
1) Configuration of the Virtex FPGA
2) Communication with logic designs loaded in the Virtex FPGA
CS[3..0]
CS[0]
CS[3..1]
64-Bit
User Defined
8/64-Bit
Virtex FPGA
Config / User
Defined
Local Bus
64-Bit/
64 MHz
QL5064
64-Bit/
66 MHz PCI BUS
Figure 3 – QL5064 Connection
More information about the Local bus interface and protocols can be obtained from
QuickLogic at:
http://www.quicklogic.com/images/QL5064_CD_UM.pdf
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