Sundance SMT387 - Manual (Page 24)

Version 1.0.3 Page 24 of 42 SMT387 User Manual
Note: An example of these procedures is available in software package SMT6087.
FPGA_PCI_CMD
FPGA_PCI_CMD[3:0] = FPGA PCI Command
0x2 = I/O Read
0x3 = I/O Write
FPGA_PCI_CMD[12] = DSP IDSEL
FPGA_PCI_CMD[13] = SATA IDSEL
FPGA_PCI_CMD[15] = PCI Reset
FPGA_PCI_CMD[16] = FPGA PCI Idle (read-only)
FPGA_PCI_ADDR
32-bit PCI Address for Reads/Writes
Low 2 bits must be "00" for configuration transactions
Byte enables are decoded from low 2 bits for I/O transactions
FPGA_PCI_ADDR[1:0] = "00" means byte 0 is read/effected
FPGA_PCI_ADDR[1:0] = "01" means byte 1 is read/effected
FPGA_PCI_ADDR[1:0] = "10" means byte 2 is read/effected
FPGA_PCI_ADDR[1:0] = "11" means byte 3 is read/effected
FPGA_PCI_DOUT
32-bit PCI Data for Write transactions
FPGA_PCI_DIN
32-bit PCI Data for Read transactions (valid only until the next PCI access)
Miscellaneous I/O
There are two user-defined jumper locations on SMT387. Refer to the section
JTAG/Multilinx headers for information on the location of these jumpers. The software
interface to the jumpers is located in the LED register of the standard Sundance
firmware. Bits 2 and 3 reflect the status of JMP0 and JMP1, respectively. Bits 0 and 1
of the LED register control FPGA LED0 and LED1, respectively. See Table 5 for
details on LED identification.
LED Designator LED Color Meaning
D1 Green IDE0 Disk Activity
D2 Green IDE1 Disk Activity
D3 Red FPGA DONE