Selecting the edge type, Arming capture, Edge capture register – Sensoray 425 User Manual
Page 15: Clearing captured edges, Interrupts, Programming sequence, Edge type is selected, Channel is armed to enable capture, Interrupt is enabled, Channel is armed to enable next capture

Page 13
Sensoray Model 425 Instruction Manual
Enhanced Relay Channels
Relay channels 0-15 have enhanced functionality
beyond the basic capabilities of channels 16-47. In
addition to basic relay I/O, these enhanced channels
have mechanisms for detecting and capturing
(recording) state transitions. Captured transitions may
be read by the host and may be programmed to request
ISAbus interrupt service.
Selecting the Edge Type
Enhanced channels may be configured to detect either
rising or falling edge transitions. The Edge Select
register simultaneously programs the desired edge
types for all enhanced relay channels:
Set a bit to detect rising edges on the associated relay
channel, or zero the bit to detect falling edges. Note
that “rising” or “falling” edges are viewed from the
perspective of data polarity on the local data bus.
Arming Capture
A relay channel must be “armed” before it will capture
a detected edge. Any arbitrary block of enhanced relay
channels may be simultaneously armed by writing to
the Capture Arm port:
Set a bit to enable edge detection for the associated
relay channel, or zero the bit to leave the capture enable
unchanged.
Edge Capture Register
Each enhanced channel is associated with a one-bit
Capture register. The Capture register is responsible for
logging the occurance of a detected edge. When a
selected edge occurs while capture is enabled, the
associated Capture register is set. All Capture registers
may be read simultaneously through the Capture port:
Note that before the Capture register can log a detected
edge, channel capture must be armed. After capturing
an edge, the capture register remains set until explicitly
reset by the host.
Clearing Captured Edges
Sometime after a captured edge is detected, it is
necessary to reset the associated capture register. This
is accomplished by writing to the Capture Disarm port:
Set a bit to disable edge detection and reset the capture
register for the associated relay channel, or zero the bit
to leave the associated arm and capture registers
unchanged. Note that a group of relay channels may be
simultaneously disarmed by setting multiple bits when
writing to this port.
Interrupts
Enhanced relay channels may be individually
programmed to request interrupt service upon capture
of a detected edge. Enable or disable relay channel
interrupts by writing to the Interrupt Enable port:
Set a bit to enable the associated relay interrupt, or zero
the bit to disable the interrupt. Note that clearing the
interrupt enable has no effect on the capture register.
Programming Sequence
In order for a relay to generate an interrupt request, the
channel must be armed, an edge must be captured, and
the interrupt must be enabled.
A typical application, with interrupts, goes like this:
•
Edge Type is selected.
•
Channel is armed to enable capture.
•
Interrupt is enabled.
•
An edge is detected by hardware, setting the capture
register and generating an interrupt request.
•
ISR disarms channel, thereby clearing capture register and
negating interrupt request.
•
Channel is armed to enable next capture.
Relay 0-15 Edge Select register (base + 34, write only)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R15 R14 R13 R12 R11 R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
Relay 0-15 Capture Arm port (base + 38, write only)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R15 R14 R13 R12 R11 R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
Relay 0-15 Capture port (base + 30, read only)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R15 R14 R13 R12 R11 R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
Relay 0-15 Capture Disarm port (base + 36, write only)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R15 R14 R13 R12 R11 R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
Relay 0-15 Interrupt Enable port (base + 30, write only)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R15 R14 R13 R12 R11 R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0