Sensoray 526 - Manual (Page 13)

13
D/A Converter
Model 526 implements a 4-channel 16-bit D/A converter. Each channel has an individual preload
buffer. Preload buffers are accessed through a single write register (DAC/ADC Data register) and
selected with 2 bits of the DAC Control register. Upload to the DAC is performed for all 4
channels from their corresponding preload buffers with a single software command and takes
approximately 8
µ
s to complete. A bit in the Interrupt Status register is set when the upload is
complete, and an interrupt is generated, if enabled in the Interrupt Enable register. See the
description of DAC Control register in the Registers section for the implementation specifics.
The DAC range is slightly wider than
± 10 V which allows for software calibration. The code value
of 0 corresponds to the most negative output voltage, the code value of 0xFFFF corresponds to
the most positive output voltage.
Calibration
The D/A converter is calibrated at the factory. For each of the 4 channels 2 coefficients are
stored in the on-board EEPROM:
a and b , such that the digital code that has to be loaded to the
DAC in order to obtain output voltage V is equal to b V a C
+ ⋅ =
, where V is in volts. The
constants are stored in the double floating point format (8 bytes per value). See the
Calibration EEPROM section for the details.
A/D Converter
Model 526 implements an 8-channel multiplexed differential 16-bit A/D converter. The input
signal range is slightly wider than
±
10 V which allows for software calibration. Multiple channels
can be digitized with one software command. Bits [14:5] of the ADC Control register allow
selection of any combination of 8 input channels and 2 reference channels (0 V and +10V). Each
of 10 digitized channels has its own buffer register. The buffer registers are accessed through a
single read register (DAC/ADC Data register) and selected with 4 bits of the ADC Control register.
A bit in the Interrupt Status register is set when the conversion is complete, and an interrupt is
generated, if enabled in the Interrupt Enable register. See the description of ADC Control register
in the Registers section for the implementation specifics.
As long as the ADC inputs are multiplexed, a multiplexor settling delay of approximately 15
µ
s is
provided automatically before each measurement. A bit in the ADC Control register allows turning
this delay off, which increases sampling rate in case of the repetitive measurements from a single
channel.
The output code of the ADC is binary two’s complement; the most positive input voltage
produces a code of 0x7FFF, the most negative input voltage produces a code of 0x8000
.
Calibration
The A/D converter is calibrated at the factory. One calibration constant is stored in the on-board
EEPROM: the actual value of the on-board 10V reference. In order to obtain accurate reading of
the input signal a normalization procedure has to be performed first: values of the on-board
+10V reference and 0V reference have to be measured. (Those values and the input values could
be measured using a single command. See the description of the A/D Control register for the
details). The actual value of the measured voltage is then obtained as