Artesyn iVPX7225 RTM Installation and Use (April 2015) - Manual (Page 46)

Controls, LEDs and Connectors
iVPX7225 RTM Installation and Use (6806800S35B) 46
S1101.4 iVPX7225 PCIE Switch EEPROM Write
Protect Follows NVMRO Backplane
Input.
May be Overridden by iVPX7225
Memory Write Protect Register at Offset
0x0B when NVMRO is LOW. iVPX7225 PCIE Switch EEPROM Write
Protected Regardless of NVMRO Backplane
Input
S1101.5 iVPX7225 ETH controller EEPROM Write
Protect Follows NVMRO Backplane
Input.
May be Overridden by iVPX7225
Memory Write Protect Register at Offset
0x0B when NVMRO is LOW. iVPX7225 ETH Controller EEPROM Write
Protected Regardless of NVMRO Backplane
Input
S1101.6 iVPX7225 IPMC SEL EEPROM Write
Protect Follows NVMRO Backplane
Input.
May be Overridden by iVPX7225
Memory Write Protect Register at Offset
0x0B when NVMRO is LOW. iVPX7225 IPMC SEL EEPROM Write Protected
Regardless of NVMRO Backplane Input
S1101.7 iVPX7225 USB-NAND Flash Write
Protect Follows NVMRO Backplane
Input.
May be Overridden by iVPX7225
Memory Write Protect Register at Offset
0x0B when NVMRO is LOW. iVPX7225 USB-NAND Flash Write Protected
Regardless of NVMRO Backplane Input
S1101.8 iVPX7225 FRAM Write Protect Follows
NVMRO Backplane Input.
May be Overridden by iVPX7225
Memory Write Protect Register at Offset
0x0B when NVMRO is LOW. iVPX7225 FRAM Write Protected Regardless of
NVMRO Backplane Input
For more information about Memory Write Protect Register, refer 6806800S11A-iVPX7225
Installation and Use manual.
Table 3-19 S1101 - Write-Protect Override Switch Bank (continued)
OFF (Default) ON