Development tools, Documentation, Licensing considerations – Altera Nios II User Manual
Page 10: Installing the development tools, The quartus ii design software

1–2
Altera Corporation
Nios II Development Kit Getting Started User Guide
May 2007
Licensing Considerations
Development Tools
Included in the kit is a folder containing the Altera Complete Design Suite 
for Windows DVD-ROM.
f
See www.altera.com for available evaluation software by third-party 
Nios II development partners.
Documentation
■
This Nios II Development Kit Getting Started User Guide
■
Quartus
®
II Installation & Licensing for Windows manual
Licensing 
Considerations
Your development kit includes a subscription for the Nios II embedded 
processor, which includes a perpetual license and one year of 
maintenance. The kit also includes a one-year license for the Quartus II 
software. To obtain your licenses, visit the Altera licensing page at http://
www.altera.com/licensing
.
Installing the 
Development 
Tools 
Your PC system must meet the Quartus II software minimum system 
requirements. Refer to the Altera Complete Design Suite System 
Requirements section of the Quartus II Installation & Licensing for Windows 
manual (included in the kit) for system requirements.
The Altera Complete Design Suite for Windows DVD-ROM contains all 
the software necessary for the kit. Refer to the Installing the Altera Complete 
Design Suite section of the Quartus II Installation & Licensing for Windows 
manual and install at least the following tools:
■
Quartus
®
II Design Software
■
MegaCore
®
IP Library
■
Nios II Embedded Design Suite
The Quartus II Design Software
The Nios II Embedded Design Suite (EDS) equires the Quartus II Design 
Software. The Quartus II design software is Altera’s comprehensive 
environment for system-on-a-programmable-chip (SOPC) hardware 
design. Using the Quartus II software, you can develop hardware design 
files, synthesize a netlist for the design, and output a configuration file for 
the target FPGA. You use the Quartus II software to assign I/O pin 
numbers, apply compilation constraints (for example, timing 
requirements), and perform timing analysis on the FPGA design. The 
Quartus II software installation also includes the SOPC Builder system 
