Guidelines for jtag bst, Guidelines for jtag bst -1 – Altera MAX 10 JTAG User Manual
Page 13
Guidelines for JTAG BST
6
2015.05.04
UG-M10JTAG
Consider the following guidelines when you perform BST with the device:
• If the “10...” pattern does not shift out of the instruction register through the
TDO
pin during the first
clock cycle of the
SHIFT_IR
state, the TAP controller did not reach the proper state. To solve this
problem, try one of the following procedures:
• Verify that the TAP controller has reached the
SHIFT_IR
state correctly. To advance the TAP
controller to the
SHIFT_IR
state, return TAP controller to the
RESET
state and send the
01100
code
to the
TMS
pin.
• Check the connections to the
VCC
,
GND
,
JTAG
, and dedicated configuration pins on the device.
• Perform a
SAMPLE/PRELOAD
test cycle before the first
EXTEST
test cycle to ensure that known data is
present at the device pins when you enter
EXTEST
mode. If the
OEJ
update register contains 0, the data
in the
OUTJ
update register is driven out. The state must be known and correct to avoid contention
with other devices in the system.
• To perform testing before configuration, hold the
nCONGFIG
pin low.
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