Elenco Understanding Logic Gates and Circuits - Manual (Page 30)

Quiz
4. Explain why S=R=1 is not allowed for the S-R NOR circuit.
5. Using De Morgan’s laws, show how you can derive the S-R NAND gate circuit from the S-R
NOR circuit. Note that the outputs of an S-R NOR latch are the opposite of the S-R NAND
latch.
6. Draw the truth table for the circuit below?
30
A
Q
B Q
Input
(A)
Input
(B)
Output
(Q)
Output
(Q)
0 0
1 0
0 1
1 1