Elenco Understanding Logic Gates and Circuits - Manual (Page 22)

Project 13: Gated D Latch
D
Q
Q
Stays the same when E=0
Reset to 0 when D=0 & E=1
Set to 1 when D=1 & E=1
E
E D Output (Q) Output (Q)
0 0 or 1 Hold State Hold State
1 0 0 1
1 1 1 0
The Gated D Latch exploits the fact that the active input combinations on an S-R Latch
(S=1, R=0 and S=0, R=1) produce opposite outputs. Thus, the Gated D Latch can be thought of
as a single input Gated S-R Latch. Gated D Latches can be used as Input/Output (I/O) ports.
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5
3
4
1
2