ADLINK PXIe-9848 - Manual (Page 29)

Operations 19
PXIe-9848
External Digital Trigger
An external digital trigger is generated when a TTL edge or equiv-
alent wave slope is detected at the SMB connector on the front
panel. As shown, trigger polarity can be selected by software.
Note that minimum TTL pulse width is 20 ns and maximum input
wave frequency is 25 MHz.
Figure 3-4: External Digital Trigger
Signal level of the external digital trigger signal can be configured
by onboard potentiometer as follows. The adjustable range is
0.8mV to 3.3V and the adjustable step 0.8mV (3.3V with 12bit res-
olution). The default voltage level is 1.67V.
Pulse Width > 20ns Pulse Width > 20ns
Rising Edge Trigger Event Falling Edge Trigger Event