Longshine GFT150 Ver.1.0 - Manual (Page 35)

PS960GLE/ PS965GME Mainboard
31
2.3.3 Advanced Chipset Features
Include all the adjustable items of chipset special features.
DRAM Timing Selectable
It refers to the method by which the DRAM timing is selected.
Setting: Manual, By SPD (Default).
CAS Latency Time
It allows CAS latency time in HCLKs as Auto, 3, 4, 5, 6 and 7. The system board designer should
set the values in this field, depending on the DRAM installed. Do not change the values in this
field unless you change specifications of the installed DRAM or CPU.
Setting: Auto (Default), 3, 4, 5, 6, 7.