Cypress EZ-USB Series 2100 - Manual (Page 9)

EZ-USB Series 2100
To write data to outside logic, the 8051 loads a data pointer with a USB FIFO register address, and then executes a “movx
a,@dptr” instruction to move a byte from the FIFO to the 8051 accumulator. The EZ-USB core simultaneously broadcasts the FIFO
data on the external data bus pins and generates the external write signal FWR# (Fast Write). A 24 MHz clock is provided for use
as an external FIFO clock, if required. EZ-USB control bits allow the timing and polarity of the FWR# signal to be tailored for
different external interface requirements.
To read data from outside logic, the 8051 loads a data pointer with a USB FIFO register address, and then executes a “movx
@dptr,a” instruction to move a byte from the accumulator to the FIFO. The EZ-USB core discards the accumulator data and instead
writes a byte from the external data bus pins to the FIFO. The EZ-USB core provides the external read signal FRD# (Fast Read) to
strobe the data, and a 24 MHz clock. Like the FRW# signal, the FRD# signal may be tailored for different interface requirements.
support extra features such as a
second data pointer, a second
UART, cycle-stretched timing, an
expanded interrupt system, and
enhanced timers. instructions on bits, flags, and
other status functions are identi-
cal to the standard 8051. The
enhanced 8051 core also provides
special function registers that The enhanced 8051 processor
increases performance by
executing most instructions in
four clock cycles instead of
twelve, as in the standard 8051.
The enhanced 8051 core also
runs at 24 MHz; that’s twice as
fast as the standard part. These
factors improve the execution
rate for most instructions by a
factor of five. The enhanced
8051 core contained in the
EZ-USB family is binary-code
compatible and performs the
same functions as the industry-
standard 8051. The effects of
A Leap in Performance with 8051 Compatibility
Clocks per instruction cycle 12 4
Data pointers 1 2
Serial ports (UARTs) 1 2
16-bit timers 1 3
Interrupt sources (int and ext) 5 13
Stretch memory cycles No Yes
Nominal operating frequency 12 MHz 24 MHz
Nominal operating voltage 5 V 3.3 V
Feature Standard Anchor