Digilent 410-205P-KIT - Manual (Page 2)

JTAG-HS1™ Programming Cable for Xilinx® FPGAs
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
Page 2 of 4
Software Support
In addition to working seamlessly with all Xilinx tools, the HS1 is supported by Digilent's Adept software and the
Adept SDK (the SDK can be freely downloaded from Digilent's website). Adept includes a full-featured
programming environment, and a set of public APIs that allow user applications to directly drive the JTAG chain.
Using the Adept SDK, custom applications can be created to drive JTAG ports on virtually any device. The HS1 also
supports SPI modes 0 and 2. Users may utilize the APIs provided by the SDK to create applications that can drive
any SPI device supporting those modes. Please see the Adept SDK reference manual for more information.
The HS1 is also supported by Digilent's AVR programmer that can target any AVR device
V
IO
: 5V to 1.8V
USB2
Port
TMS
TDI
TDO
TCK
SS
MOSI
MISO
SCK
SPI Device JTAG-HS1
GND
VDD
GND
VIO
Figure 1. Diagram of signal voltages and connections. Figure 2. Xilinx JTAG headers.
Figure 3. JTAG-HS1 SPI Device Connections.