Digilent 410-297P-KIT - Manual (Page 11)

ChipKIT MX3 Board Reference Manual
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the configuration settings specified using the #pragma config statement. Use #pragma config POSCMOD=XT to
select the XT option.
Using the internal system clock phase-locked loop (PLL), it is possible to select numerous multiples or divisions of
the 8Mhz oscillator to produce CPU operating frequencies up to 80Mhz. The clock circuit PLL provides an input
divider, multiplier, and output divider. The external clock frequency (8Mhz) is first divided by the input divider
value selected. This is multiplied by the selected multiplier value and then finally divided by the selected output
divider. The result is the system clock, SYSCLK, frequency. The SYSCLK frequency is used by the CPU, DMA
controller, interrupt controller and pre-fetch cache.
The values controlling the operating frequency are specified using the PIC32MX320 configuration variables. These
are set using the #pragma config statement. Use #pragma config FPLLIDIV to set the input divider,
#pragma config FPLLMUL to set the multiplication factor and #pragma config FPLLODIV to set the
output divider. Refer to the PIC32MX3XX/4XX Family Data Sheet and the PIC32MX Family Reference Manual,
Section 6. Oscillators, for information on how to choose the correct values, as not all combinations of
multiplication and division factors will work.
In addition to configuring the SYSCLK frequency, the peripheral bus clock, PBCLK, frequency is also configurable.
The peripheral bus clock is used for most peripheral devices, and in particular is the clock used by the timers, and
serial controllers (UART, SPI, I2C). The PBLCK frequency is a division of the SYSCLK frequency selected using
#pragma config FPBDIV. The PBCLK divider can be set to divide by 1, 2, 4, or 8.
The following example will set up the ChipKIT MX3 for operation with a SYSCLK frequency of 80Mhz and a PBCLK
frequency of 10Mhz:
#pragma config FNOSC = PRIPLL
#pragma config POSCMOD = XT
#pragma config FPLLIDIV = DIV_2
#pragma config FPLLMUL = MUL_20
#pragma config FPLLODIV = DIV_1
#pragma config FPBDIV = DIV_8
Documentation for the available PIC32 configuration variables can be found in the PIC32MX Configuration Settings
guide. This is found using the “Help.Topics…” in the MPLAB IDE. Refer to Appendix E for an example of setting the
configuration variables.
When using the ChipKIT MX3 with the MPIDE software, the clock source is automatically set by the boot loader
and no action is required.
6 UART Interface
The PIC32MX320 microcontroller provides two UART interfaces, UART1 and UART2. The UARTs can provide either
a 2-wire or a 4-wire asynchronous serial interface. The 2-wire interface provides receive (RX) and transmit (TX)
pins. The 4-wire interface includes request-to-send (RTS) and clear-to-send (CTS) in addition to receive and
transmit.