beautypg.com

Logic block diagram pin configuration, Pin soic/tsop ii pinout top view – Cypress CY62148E User Manual

Page 2

background image

CY62148E MoBL

®

Document #: 38-05442 Rev. *F

Page 2 of 10

Logic Block Diagram

Pin Configuration

[2, 4]

A0

IO0

IO7

IO1
IO2
IO3
IO4
IO5
IO6

A1

A2

A3

A4

A5

A6

A7

A8

A9

SENSE AMPS

POWER

DOWN

CE

WE

OE

A

13

A

14

A

15

A

16

A

17

ROW DECODER

COLUMN DECODER

512K x 8

ARRAY

INPUT BUFFER

A10

A11

A12

A

18

Note

4. NC pins are not connected on the die.

1
2
3
4
5
6
7
8
9

10
11

14

31

32

12
13

16

15

29

30

21

22

19

20

27

28

25

26

17

18

23

24

32-pin SOIC/TSOP II Pinout

Top View

A

17

A

16

A

15

A

14

A

13

A

12

A

11

A

10

A

9

A

8

A

7

A

6

A

5

A

4

A

3

A

2

A

1

A

0

IO

0

IO

1

IO

2

IO

3

IO

4

IO

5

IO

6

IO

7

V

SS

V

CC

A

18

WE

OE

CE

[+] Feedback