Cirrus Logic AN186 - Manual (Page 2)

AN186
2 AN186REV1
TABLE OF CONTENTS
1. INTRODUCTION ....................................................................................................................... 3
2. THE SUPPORTED POWER MANAGEMENT STATES ........................................................... 3
3. THE DEGLITCHER ................................................................................................................... 3
4. WAKEUP DELAYS ................................................................................................................... 3
4.1 Power-up Delay - 100us .................................................................................................... 4
4.2 1 to 2 Second Delay .......................................................................................................... 4
4.3 Manual WAKEUP Signal Generation ................................................................................. 5
4.3.1 Automatic WAKEUP Signal Generation ................................................................ 5
5. LOCK-OUT PERIOD DELAYS ................................................................................................. 6
5.1 Rationale behind the Lock-out Period Delays .................................................................... 6
6. THE FUNCTION OF "RUN/CLKEN" OUTPUT PIN AS IT RELATES
TO WAKEUP OPERATIONS .................................................................................................. 6
7. WAKEUP AND NURESET CAVEAT ........................................................................................ 7
8. TIMING DIAGRAMS ................................................................................................................. 8
8.1 Timing Diagram in the case of a Cold Boot ....................................................................... 8
8.2 Timing Diagrams for the Case of Wakeup from Standby State ......................................... 9
9. AUTOMATIC WAKEUP CIRCUIT .......................................................................................... 11
LIST OF FIGURES
Figure 1. EP72/73XX Power Management States .......................................................................... 3
Figure 2. Example Circuit for Keeping nURESET Inactive during Prescribed Period ..................... 7
Figure 3. Timing Diagram for the Case of a Cold Boot ................................................................... 8
Figure 4. Timing Diagram, External OSC(13 MHz) with “CLKEN” on ‘”RUN/CLKEN” Pin .............. 9
Figure 5. Timing Diagram, External OSC (13 MHz) with “RUN” on “RUN/CLKEN” Pin .................. 9
Figure 6. Timing Diagram, PLL Clock with “CLKEN” on “RUN/CLKEN” Pin ................................. 10
Figure 7. Timing Diagram, PLL Clock with “RUN” on “RUN/CLKEN” Pin ..................................... 10
Figure 8. Automatic Wakeup Circuit.............................................................................................. 11
LIST OF TABLES
Table 1. Wakeup Delays ................................................................................................................. 6
Contacting Cirrus Logic Support
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http://www.cirrus.com/corporate/contacts/sales.cfm
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